I guess the most notable thing is putting the memory controller on the cpu chip , which has already been done by the alpha people , and has already been shown to have upsides and downsides 我想最值得注意的就是將存儲(chǔ)器控制器放到cpu芯片上,這一點(diǎn)開發(fā)alpha的人員已經(jīng)使用了,而且已經(jīng)表現(xiàn)出有利也有弊。
It is designed for embedded applications with the following features : separate instruction and data caches ( harvard architecture ) , 5 - stage pipeline , hardware multiplier and divider , interrupt controller , 16 - bit i / o port and a flexible memory controller . new modules can easily be added using the on - chip amba ahb / apb buses . it has flexible peripheral interfaces , so can be used as an independent processor in the board - level application or as a core in the asic design 它遵照ieee - 1745 ( sparcv8 )的結(jié)構(gòu),針對嵌入式應(yīng)用具有以下特點(diǎn):采用分離的指令和數(shù)據(jù)cache (哈佛結(jié)構(gòu)) ,五級流水,硬件乘法器和除法器,中斷控制器, 16位的i / o端口和靈活的內(nèi)存控制器,具有較強(qiáng)的異常處理功能,新模塊可以輕松的通過片上的ambaahb / apb總線添加。
The memory controller is a digital circuit which manages the flow of data going to and from the main memory. It can be a separate chip or integrated into another chip, such as on the die of a microprocessor.